Determining the junction temperature in a semiconductor package, part IV – localized heat generation on the die

In the standard thermal test environment, thermal test chips are designed to dissipate the applied power uniformly over most of the die surface. However, in many situations of practical interest, the power is dissipated over a localized area of the die. This column provides calculation methods to deal with the latter situation.

Figure 1 illustrates the situation of interest here: A semiconductor die of thickness t_DIE, area A_DIE, and thermal conductivity _DIE, is attached to a mounting surface by a thin adhesive layer referred to as a die attach layer, with similarly named parameters: t_DA, A_DA, and _DA. As is obvious from the Figure, A_DA = A_DIE. The heat dissipation is presumed to occur over an area A_SOURCE, centered over the die area.The mounting surface is assumed to be of high thermal conductivity, leading to an isothermal boundary condition, TS, at the underside of the die attach layer. The thermal resistance _JS, is defined as the total thermal resistance between the top of the die (the junction) and the mounting surface. If this thermal resistance is known, then the peak die temperature could be calculated from the expression

(1) TJS = P x JS

In the use of analytical expressions to calculate thermal resistances, there is the continual trade-off between accuracy and complexity. In this column, we have explored the use of the 1-D thermal resistance equation. It is certainly a candidate for the situation here because of its simplicity. We will also explore the use of a more complicated expression that can be used to determine the spreading resistance for heat to flow from the source to the edges of the die, which was developed to deal with localized heat sources in situations involving heat sinks.[1]

The 1-D thermal resistance equation can be applied to calculate thermal resistance values under two sets of assumptions that act as limiting conditions for any actual heat flow pattern:

• The heat flows from the die surface to the mounting surface uniformly over the entire die and die attach area. This represents an optimum heat flow situation.
• The heat flows to the mounting surface only within the die and die attach area immediately under the source area.. This corresponds to a worst case heat flow situation.

 

The 1-D thermal resistance equation for component X has the form

(2)

_JS can be calculated in these two extreme cases from a simple sum of the die and die attach thermal resistances:

(3) JS = DIE + DA

In order to take into account the spreading resistance, an extra term is added to this expression:

(4) JS = DIE + SPR + DA

where _DIE and _DA are from the 1-D formula calculated in the best case situation (A = A_DIE). The spreading resistance is calculated from the more imposing formula [1]:

where is defined as

(6)

Equations 3 and 4 were applied to calculating the _JS for three situations, whose assumptions are defined in Table I. The first two cases involve a silicon die and the third, a gallium arsenide die. The values of die thickness are typical.A commercial finite-element-analysis (FEA) program [2] was used to provide comparative values for each condition analyzed. Since attention was paid to appropriate mesh refinement, the results of these calculations are here considered to be the “exact” solution. The thermal resistance, _JS was calculated using Equation 1, inserting the peak die temperature calculated for T_J. The results of all three calculation methods are listed in Table II.As is evident, the 1-D calculation has better accuracy than the 1-D + Spreading Resistance calculation for source widths down to: 4mm (Case 1); 5mm (Case 2); and 2 mm (Case 3). The apparent conclusion is that the simple 1-D expression is more accurate than the 1-D + Spr. Res. formula for values of A_SOURCE near A_DIE. The cross-over point extends to smaller values of A_SOURCE for die constructions having reduced heat spreading ability – by virtue of reduced thickness or thermal conductivity, or both. For values of the source area below the cross-over point, the error in the 1-D result increases dramatically.

TABLE II JS RESULTS SQUARE DIE AND SOURCE CASE NO./ DIE/ DIE THK. SOURCE width (mm) FEA 1-D (A=ASOURCE) 1-D + Spr. Res RESULT (C/W) RESULT (C/W) % ERROR RESULT (C/W) % ERROR #1, Si, 0.4 mm 10 0.17 0.17 -0.1% 0.17 -0.1% 7.5 0.30 0.30 0.9% 0.35 17.2% 5 0.64 0.68 5.3% 0.74 15.5% 4 0.95 1.1 10.9% 1.06 11.4% 3 1.5 1.9 23.7% 1.63 7.3% 2 2.7 4.2 56.3% 2.87 5.9% 1 6.2 16.9 175.0% 6.77 9.9% 0.5 12.7 67.8 431.8% 13.7 7.3% 0.25 24.4 271.1 1009.2% 25.5 4.3%

This trend can be put on a more rigorous footing by making use of a non-dimensional parameter, defined herein for the purpose of this analysis. It is constructed to have a high value for situations of high heat spreading and conversely. This parameter is defined as

(7)

The graphs above indicate the relationship between the error of each calculation and the Spreading Parameter. The error in the 1-D calculation demonstrates a very predictable behavior: for values of the Spreading Parameter in excess of 0.03, the error exceeds 10%. The error in the 1-D + Spr. Res. calculation exhibits a more complicated oscillatory behavior. The error is certainly worse for the GaAs die, the situation studied with the least amount of heat spreading. However, in a