A team of IBM Researchers in collaboration with two Swiss partners are looking to keep “Moore’s Law” alive for another 15 years. The law states that the number of transistors that can be placed inexpensively on an integrated circuit will double every 18 months. More than 50 years old, this law is still in effect, but to extend it as long as 2020 will require a change from mere transistor scaling to novel packaging architectures such as so-called 3D integration, the vertical integration of chips. IBM, École Polytechnique Fédérale de Lausanne (EPFL) and the Swiss Federal Institute of Technology Zurich (ETH) signed a four-year collaborative project called CMOSAIC to understand how the latest chip cooling techniques can support a 3D chip architecture. Unlike current processors, the CMOSAIC project considers a 3D stack-architecture of multiple cores with a interconnect density from 100 to 10,000 connections per millimeter square. Researchers believe that these tiny connections and the use of hair-thin, liquid cooling microchannels measuring only 50 microns in diameter between the active chips are the missing links to achieving high-performance computing with future 3D chip stacks.
A key challenge will be to remove the heat generated as chip volumes become smaller and smaller . To solve the cooling challenge, the team is leveraging the experience of IBM and ETH in the development of Aquasar, a first-of-a-kind, water-cooled supercomputer. Similar to Aquasar, the team plans to design microchannels with single-phase liquid and two-phase cooling systems using nano-surfaces that pipe coolants—including water and environmentally-friendly refrigerants—within a few millimeters of the chip to absorb the heat, like a sponge, and draw it away. Once the liquid leaves the circuit in the form of steam, a condenser returns it to a liquid state, where it is then pumped back into the processor, thus completing the cycle.
