Feb. 1-2, Santa Clara Convention Center, Santa Clara, Calif.
Tracks include Chip-Level System Design and Verification, High-Speed Signal Processing, Equalization and Coding, Power Integrity and Power Distribution Networks, Electromagnetic Compatibility and Interference, Test and Measurement Methodology, RF and Microwave Signal Integrity, Analog and Mixed-Signal Design and Verification, FPGA Design and Debug, System Co-Design: Chip/Package/Board, PCB Materials, Processing and Characterization, PCB Design Tools and Optimization Techniques, High-Speed Parallel Interface Design, Multi-Gigabit Serial Interface Design, and High-Speed Timing, Jitter and Noise.
