The Applicability of JESD51-14 for the Determination of Junction to Case Thermal Resistance

Rjc (or sometimes ThetaJC, θjc, Rth_jc), the so-called ‘junction to case’ thermal resistance, is a thermal metric that enables comparison of the thermal performance of packaged semiconductor devices from differing suppliers. The JEDEC standard JESD51-14 [1] documents a method for the experimental determination of Rjc. Although applicable for packages that exhibit a predominantly one-dimensional (1D) heat flow path (e.g. power packages), its repeatability makes it an attractive option to be applied more widely. So how valid is JESD51-14 for a wider range of package styles and what really is meant by a 1D heat flow path?

Steady State vs. Transient Rjc Measurements

The classical definition of thermal resistance is the temperature difference between 2 iso-thermal surfaces divided by the heat that flows through those surfaces when in a steady state. For Rjc, one of those temperatures is the junction temperature, usually measured by applying JESD51-1, the electrical test method. The other temperature is the case temperature, the temperature at the center of the peripheral surface of the package through which the majority of heat passes. Depending on the package style, this might be the top face that has a heatsink attached or the bottom face that would be soldered to the PCB. Case temperature is usually measured using a thermocouple embedded at the interface of the case face and the object that it is attached to. It is worth noting that there is currently no published JEDEC standard that documents this method.

JESD51-14 is an alternative approach that is best described as a ‘transient dual interface method’ (TDIM). Here, only the junction temperature is recorded, but two transient measurements are made. The difference between the two measurements is due to a change in the interfacial resistance at the case face. This is usually realised by first applying some thermal interface material (e.g. paste) on the heatsinked case face, and then not. Rjc is denoted by the point at which the resulting Zth response curves deviate (effectively the point that the transient junction to ambient thermal resistances deviate).

Both methods are summarised in Figure 1. Here a package is considered on a low thermal conductivity board and heatsinked via a coldplate attached to its top case face. Note that, in lieu of physical measurements being used, this article instead employs a conjugate heat transfer thermal simulation-based approach.

How ‘Accurate’ is JESD51-14?

How does the value of Rjc determined by JESD51-14 compare to that from the steady state approach? Maybe it’s wrong to ask how ‘accurate’ JESD51-14 is, as that would imply that the steady state value of Rjc is formally ‘correct’. It could be argued that, due to the non-uniformity of temperature across the case face (regardless of the effectiveness of the heatsink), considering a single measured point temperature at the case face does not conform to the iso-thermal requirements of the definition of a thermal resistance. Despite this, one would at least expect the JESD51-14 Rjc value to be comparable to the steady state value.

JESD51-14 Applied to a BGA Style Package

The applicability of JESD51-14 to power package styles, such as TO-263, D2PAK etc., is well documented [2]. How though would a BGA style package fare when its Rjc was determined using the TDIM as compared to the steady state method? Two typical BGAs were considered, one with a metal lid (Figure 2), the other identical but with an epoxy overmold instead of the lid. Both were attached to a low thermal conductivity (as per JESD51-3) board and heatsinked using a coldplate [3].

Table 1

Table 1 summarises the simulated Rjc values as determined by the steady-state method and JESD51-14, for both BGA variants.

The lidded BGA JESD51-14 Rjc value corresponds exactly to that determined using the steady-state approach. However, for the overmolded BGA, the JESD51-14 Rjc value is about half that of the steady-state approach. If one considers the 1D heat flow requirements of JESD51-14 then, despite the relative complexity of the lidded BGA topology, it still must conform to this requirement. For the overmolded BGA, is it more erroneous due to the fact that Rjc is simply higher, or that it is less 1D in nature, due to the ratio of Rjc to Rjb (the thermal resistance from junction to board)?

Rjc vs. Rjb

Does a 1D heat flow just entail all the dissipated heat flowing from the junction through the heatsinked case face of a package? For that to occur, surely all that’s required is that Rjc << Rjb?

Is that therefore the criteria for determining the applicability of JESD51-14?

To answer these questions, an extended range of package styles were therefore considered (Figure 3).

JESD51-8 [4] documents the method to determine Rjb, utilising a ring cold plate to achieve a steady state heat flow down through the package and into a high thermal conductivity board, with the board temperature measured 1mm from the longest side of the package. This configuration was replicated in the simulation model and Rjb values were determined for each of the above package styles. Similarly, both JESD51-14 and steady-state Rjc values were determined by simulation. Figure 4 plots the ‘error’ of the Rjc value determined with JESD51-14, as compared to the steady state value, against the ratio of Rjb to Rjc.

All JESD51-14 Rjc values were lower than the steady state Rjc values. For the three package styles that had a (steady state) Rjb/ Rjc > 10, the error of a JESD51-14 Rjc value was < 6%. All others had errors > 40%. So, at least for the typical packages considered, JESD51-14 does appear to be applicable when Rjc is substantially lower than Rjb.

Metrics vs. Models

Whereas a metric should be used for comparative purposes only, there is still the obligation that it reflects, to some extent, the thermal performance of a package. It might be (mis)used for predictive purposes, but then any modelled temperature would only be valid for exactly the same thermal environment that was imposed for the extraction of that metric.

When using simulation to predict operational thermal performance, a thermal model should be used instead. From simplistic 2-resistor models [5], Cauer RC ladder type models [1] through to boundary condition independent DELPHI type models [6] and state-of-the-art ROM models [7] there are many options to choose from. All of which however are either predicated on the availability of models from a component supplier or require the end-user to extract the models themselves from a combination of measurement and simulation.

Conclusion

Not suffering the complications and lack of reproducibility of case temperature thermocouple measurements, JESD51-14 is an attractive approach for Rjc determination. Its general applicability may well reach beyond just common power packages, so long as the heat flow is predominantly 1D, which in turn might be characterised by Rjb/Rjc > ~10.

References

[1] https://www.jedec.org/standards-documents/docs/jesd51-14-0

[2] https://www.electronics-cooling.com/2010/09/transient-dual-interface-measurement-of-the-rth-jc-of-power-semiconductor-packages/

[3] R. Bornoff, “Application of JESD51-14 to BGA Package Styles,” 2022 38th Semiconductor Thermal Measurement, Modeling & Management Symposium (SEMI-THERM), San Jose, CA, USA, 2022, pp. 48-54.

[4] https://www.jedec.org/standards-documents/docs/jesd-51-8

[5] https://www.jedec.org/standards-documents/docs/jesd-15-3

[6] https://www.jedec.org/standards-documents/docs/jesd-15-4

[7] L Codecasa, V d’Alessandro, A Magnani, N Rinaldi, PJ Zampardi, “Fast novel thermal analysis simulation tool for integrated circuits (FANTASTIC)”, 20th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC) article 6972507 United Kingdom, 2014.