Introduction Today, there is a specific demand by the electronics consumer market: more devices using low power processors with multiple simultaneous CPU functions. Due to the significant demand in computing needs, the International Technology Roadmap for Semiconductors (ITRS) 2005 predicts an increase in the overall power consumption for some platforms [1]. The cooling issues … [Read more...]
Microscale heat transfer
Advances in microfabrication processes have led to a continuous miniaturization of Field Effect Transistors (FET) that contain semiconductor (e.g., silicon), insulator (e.g., silicon dioxide), and metallic (e.g., copper interconnects) layers only a few nanometers thick. Ever increasing demand for faster microprocessors and the continuous trend to pack more transistors on a … [Read more...]
In the data center, power and cooling costs more than the it equipment it supports
Historically, the cost of energy and the cost of the data center power and cooling infrastructure have not been on the radar for most Chief Financial Officers (CFO) and Chief Information Officers (CIO) and have not been considered in TCO (Total Cost of Ownership) models. As a result, almost all of the focus has been on driving down the cost of IT equipment in the data center. … [Read more...]
Adhesion of Thermal Interface Materials for CPU Heatsinks, an Overlooked Issue
High performance thermal interface materials (TIMs) inserted between the CPU lid and heatsink - generally referred to as the "TIM2" - provide a reworkable low resistance thermal path in the package stack-up. It is well-recognized that users need to monitor the thermal performance of the TIMs to verify vendor data [1, 2]. Less well-known is that the TIM2 can also mechanically … [Read more...]
Toward A Thermal Figure Of Merit For Multi-Chip Packages
Toward A Thermal Figure Of Merit For Multi-Chip Packages Bruce M. Guenin, Ph.D., Associate Editor Introduction Last issue's Calculation Corner dealt with methods for predicting the temperature of each chip in a Multi-Chip Package (MCP) at an arbitrary combination of chip power levels using the principle of superposition [1]. One of the main points of that article was that both … [Read more...]
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