Evan Colgan, Jamil Wakil, IBM Introduction As it becomes increasingly difficult to scale devices down to improve performance, alternate approaches such as 3D chip stacks are being developed, which improve system performance by increasing the interconnect density and reducing the interconnect length(1).  The stacking of multiple chips with through silicon vias (TSV) and fine … [Read more...]

Jason Carter, Jeremy Acord, Dan Hoffmann, Andrew Trageser, Charles Pagel Penn State University – Electro-Optics Center, Freeport, Pa.NSWC, Crane Division, Crane, Ind.   1. Introduction As a nascent technology compared to GaAs, Si, or nonsolid state technology, GaN-on-SiC transistors have not established a history of reliability from which end-users of the technology can … [Read more...]