Although the potential for low temperature enhancement of CMOS circuit performance has been recognized for some time, circuit scaling (proportionally reducing the size of the circuit) has been the preferred method of achieving higher performance. But as minimum feature size passed well into the sub-micron and now into the nanometer region, this route to higher performance has … [Read more...]
Determining the junction temperature in a semiconductor package, part IV – localized heat generation on the die
In the standard thermal test environment, thermal test chips are designed to dissipate the applied power uniformly over most of the die surface. However, in many situations of practical interest, the power is dissipated over a localized area of the die. This column provides calculation methods to deal with the latter situation. Figure 1 illustrates the situation of interest … [Read more...]
Low temperature electronic cooling
The potential for low temperature enhancement of CMOS performance has been recognized for some time, going back as far as the late 1960's and mid-1970's. A collection of articles focusing on low temperature electronics is included in the book by Kirschman(1) where a number of researchers [2-6] have identified the advantages of operating electronics at low temperatures. Jaeger … [Read more...]
Application of Thermoelectric Coolers for Module Cooling Enhancement
Figure 1. Cooling power density for different T.E. cooler designs (adaped from Vandersande and Fleurial [6]). Introduction Many advances in computer technology have been made possible by increases in the packaging density of electronics. These advances began with the introduction of the transistor in 1947 and continue today with ultra-large scale integration at the chip level … [Read more...]
Determining the junction temperature in a semiconductor package, part III the use of the junction-to-board thermal characterization parameter
In recent issues, this column has dealt with the use of a number of thermal metrics to calculate the junction temperature of integrated circuits under various conditions. These metrics explored were JA, JC, and JT. To summarize the uses of these metrics: JA represents the junction-to-air thermal resistance for a package tested in an industry-standard test environment. It is … [Read more...]
